LEAP: Layout Design through Error Aware Transistor Positioning for Soft-Error-Resilient Sequential Cell Design


Year: 
2010
Presenter: 
Full Citation: 
Lee, H.-H. K., K. Lilja, M. Bounasser, P. Relangi, I. R. Linscott, U. S. Inan and S. Mitra (2010), LEAP: Layout Design through Error Aware Transistor Positioning for Soft-Error-Resilient Sequential Cell Design, IEEE International Reliability Physics Symposium (IRPS), Anaheim CA, May 2-6.